1. Field of the Present Invention
The present invention relates to a technique for producing planar silicon on insulator MOS transistors, where the channel regions are created in an underlying single crystal silicon wafer, and where the source-drain extension regions are created by damascene patterning a thin film of amorphous silicon deposited on a layer of oxide deposited on the silicon wafer.
2. Description of the Prior Art
The primary advantage of using silicon on insulator (SOI) substrates, rather than using bulk silicon, for forming MOS transistors has long been recognized as being that of reduced stray capacitance. This allows, of course, higher operating frequencies to be obtained. SOI has other advantages such as better packing density, borderless contacts, latch-up freedom, and radiation hardness.
A thin film of crystalline silicon epitaxially deposited on a polished single crystal aluminum oxide substrate (SOS) was the first composite material to be used for SOI. However, since the crystal properties of aluminum oxide do not perfectly match those of silicon there has always been the problem of reduced yield due to defects in the silicon film.
In recent years SOI circuits have been made by forming a thin film of crystalline silicon on silicon dioxide, where the oxide has been grown on a silicon support wafer. This has enabled the production of silicon films with much lower defect densities, because the support wafer physical properties, such as thermal expansion coefficient, match those of the silicon film. Currently SOI refers to silicon on oxide, which will be our convention.
There are a few different methods for producing SOI substrates, such as wafer bonding or high current oxygen implantation. All of these methods are rather difficult because the silicon film has to be single crystal, and for best performance of the finished circuit, the film should be very thin (less than approximately 1000 Angstroms).
Another difficulty with current SOI is that the MOS transistor body connections are typically left floating for efficiency of chip layout. This can sometimes cause problems. For example, excess charge can remain in a transistor floating body region when attempting to turn a transistor off, which can slow down circuit operation. This problem can be solved by implanting just the right amount of recombination centers in the film; however, this is difficult to control, because too many centers will degrade the mobility of the film.
It is therefore the object of the present invention to provide a simplified method for producing SOI substrates; and to provide a technique for electrically connecting MOS body regions to well defined voltages without incurring any layout area penalty; and to maintain the high density layout capability of current SOI.